Satyanarayana Bheesette

October 03, 2000



Specification of the D0 MFC test stand software



  1. Introduction


A VME module called Muon Fanout Test Card (MFTC), which will be used for testing the Muon Fanout Card (MFC) is being designed by Mark Kozlovsky and Terrence O'Brien. The test system will consist of a D0 standard VME crate in which the VME processor module (CPU), MFTC and MFC under test are installed. The MFTC is expected to simulate signals and functions that are offered by Trigger Frame Work (TFW), Muon Readout Cards (MRC) and Trigger Fanout Card (TFC) of the actual readout system.


The CPU has Ethernet interface with an assigned IP address. It runs VxWorks - a realtime, multitasking operating system at its kernel. The kernel gets automatically loaded at the bootup time from d0ola, the D0 online server. Software to run in the CPU is typically coded in C, cross-compiled and linked in d0mino and downloaded to d0ola. The programs then are downloaded to the CPU and executed from there. The user interface is provided either from an alphanumeric terminal or from a Hyperlink session running in a PC connected on the console port of the processor module through its COM port.


  1. Documentation


Detailed documentation is available for the MFC(MFC Specification and MFC User's Guide) and on the D0 Muon Readout Crate Software Specification at the Muon Electronics Homepage (http://www-d0.fnal.gov/muon_electronics/). Documentation for the MFTC may also appear at the same page as and when it is ready.


  1. Test procedures


The test software essentially communicates with CPU, MFC and MFTC during the test cycles. The main test functions foreseen at this stage are the following:


  1. Inializations which include


  1. Initializing Muon Fanout Card

This function stops MFC's internal sequencer, resets the HotLink interface and initializes the Serial Command Line Receiver(SCLR). It also sets MFC in External mode by VME.

  1. Initializing Muon Fanout Test Card

This function initializes MFTC, disables HotLink transmitter, reframes MFC HotLink receiver and reenables transmitter.

  1. Setting up interrupts and Interrupt Service Routines

It setsup ISRs for VBDdone, L2Acc, SRQ, TFWInit etc. Interrupt controller mode register, edge flip-flop selective reset register and edge polarity registers are also preset by appropriate values. Finally, interrupt master as well as slave chips are programmed and made ready for accepting interrupts.

  1. Initializing SCLR

This is separate function to initialize SCLR and report various detailed test results from the operation.


  1. Memory checks which include


  1. Sequencer dual port memory of MFC

This includes testing for the presence of memory and performing various memory checks such as write/read test, write/read bits test and alternate bits tests. All tests are non-destructive.

  1. Error records and Timekeeping memory, including non-volatile memory of MFC

This includes testing for the presence of memory and performing various memory checks such as write/read test, write/read bits test and alternate bits tests. All tests are non-destructive.

  1. FIFO bank memory

This includes performing various memory checks such as write/read test, write/read bits test and alternate bits tests on all FIFO memory banks. All tests are non-destructive.

  1. Checks for presence of various MFC registers

This includes testing for the presence of various MFC registers such as control, status, error, sequencer, interrupt service, interrupt control, id registers and also write/read tests on these registers.

  1. Checks for presence of various MFTC registers

This includes testing for the presence of various MFC registers such as control, status, error, sequencer, interrupt service, interrupt control, id registers and also write/read test on these registers.


  1. Trigger checks with different sources


  1. Test mode in which signals are produced by the internal sequencer.

The sequencer transforms a data pattern which is pre-loaded in the sequencer's memory into a set of parallel signals. There are two modes of operation possible with this source:

  1. Single mode in which only one beam turn is simulated and

  2. Continuous mode which can run for a fixed number of turns or continuously until reset.

Functions are to be provided for initializing, starting and stopping the sequencer and also to report the test results.

  1. SYS mode in which triggers are received from Hotlink connection. In this mode, MFTC simulates TFC signals. There are two modes of operation possible with this source:

  1. Normal operating mode in which TFC transfers encoded data and

  2. Framer enabled mode when a sequence of pad characters is constantly transmitted from the TFC instead of data in order to establish synchronization between TFC's Hotlink Transmitter and MFC's Hotlink receiver.

Functions are to be provided for initializing, starting and stopping the operation and also to report the test results.

  1. TFW mode in which triggers are received from Serial Command Link Receiver Mezzanine card. In this mode, MFTC simulates TFW signals.


  1. Testing of various interrupts


16 prioritized maskable interrupts with 4 programmable responses for each interrupt are supported by MFC. They include:


  1. Done from VME Buffer Driver(VBD)

  2. SRQ from the MRCs

  3. L1ERR

  4. L2ERR

  5. INIT signal(rising edge)

  6. L1BUSY

  7. L2BUSY

  8. L1DEC - L1 decision

  9. L2DEC - L2 decision

  10. L1ACC - L1 accept

  11. L2ACC - L2 accept

  12. L2REJ - L2 reject

  13. FOVFL - FIFO overflow

  14. FEMPTY - FIFO empty


Interrupt procedures and service routines should be supported to check all or all relevant interrupts of the MFC. MFTC is expected to provide a register with individual bits for flagging different interrupts to the MFTC via VME backplane.


  1. NVRAM configuration


Complete support may be provided for setting up MFC's NVRAM and the configuration file. The parameters that can be configured include GS id, clock and calendar, crate configuration and so on. Functions may be provided to take in the username and password of the operator, verify the authentication and allow changes only if the user is authorized to do so. Certain book-keeping jobs like storing the operator name in the NVRAM, clearing the unused NVRAM area and computing and storing fresh checksum values are also performed if the any of the configuration is changed in that session. Function may be provided for listing of the current configuration in user-friendly format.


  1. Diagnostic functions


Diagnostic functions are very useful while debugging a MFC. The following diagnostic functions may be provided by the test software.


  1. Displaying contents of all important internal registers of MFC.

  2. Displaying contents of all important internal registers of MFTC.

  3. Modifying contents of all important internal registers of MFC interactively.

  4. Modifying contents of all important internal registers of MFTC interactively.

  5. Displaying a block of memory interactively.

  6. Modifying a block of memory interactively.

  7. Interactive function to display data in MFC FIFO banks.

  8. Function to loop in a block of memory in a read or write cycle. This function meant for debugging of a card for its decoding circuitry etc.


  1. Miscellaneous functions


Miscellaneous functions include the following.


  1. Functions to probe for the presence of MFC and MFTC cards in the crate.

  2. Function to get the GS id and serial number of the MFC card under test.

  3. Function to display a short help on the operation of the test software.

  4. Function to display about the test software.


  1. On-line electronic log book functions


  1. All the test reports and results of a MFC under test may be stored in a log file, which can be moved to a permanent area from the processor at the end of a test session. An optional command line parameter to the test software may control this function.

  2. Function may also be provided to browse previous log files.